17th Jan 2011
Network of Engineering Institutions(NEI) Meet.

17th to 31st Dec 2010

Prof Amara Amara's visit

Applicants are sought for one Junior/Senior Research Fellow (JRF/SRF), or Research Associate (RA) position, to work on a research project on “Analog and digital circuit design with double-gate MOSFETs”, sponsored by the Indo-French Council for the Promotion of Advanced Research. This is a joint project with ISEP, France and as much as half of the duration of the assignment will be spent at the partner institution in Paris. (The visits will be paid for from the project funds).

The position is for three years (with an initial appointment for one year, and renewed subsequently for two more).

Salary (inclusive of HRA)

JRF/SRF (with 0 to 2 years experience) Rs. 14000 – 15000 per month
RA (M.Tech./M.E. with 3 years experience) Rs. 16000 – 18000 per month

The exact salary, and designation of the position, will be dependent upon the qualification and experience of the person selected. Additional compensation may be available in form of a teaching assistantship.


* a B.Tech./B.E. or an M.Tech./M.E./M.Sc. in Electronics Engineering or a related discipline;
* proficiency in analog and/or digital circuit design;
* 60% marks or equivalent in the qualifying degree as per the norm set by the respective Institute or University; and
* good proficiency in English.

The candidate recruited is expected to register for the PhD program at DA-IICT within 6 months from the date of joining. S/he will work both independently and as a member of a research team.

Applicants should submit a cover letter and a CV (including a list of publications, if any) either by email to Prof. Chetan Parikh at:, or by regular mail to the address below. In your application, please include a contact phone number.

Prof. Chetan Parikh
Faculty Block 1
Near Indroda Circle
Gandhinagar – 382007
Last date for receiving applications : 31 August 2009.

       National Workshop on PhD research in VLSI, 2009
Lecture sessions by Prof.Amara Amara, ISEP, France on "Low power VLSI" (slides)

Dr.Rajendra Pratap visit, followed by a workshop on ASIC design and cadence tools

Workshop on "Designing a Modern System on Chip for Test" by Texas Instruments and VLSI Society of India (VSI)


Lecture series on "Designing Semiconductor Memories by Dr.Kaushik Saha, STMicroelectronics, Noida" (Slides) *Right Click and choose 'save as' to download the slides
Training program on "Advanced Layout techniques and Magic-Layout Editor Tool" by kishore.Y, Research Engineer for VLSI 07-08, DA-IICT


Lecture series on "Hardware Description Languages and FPGA based Design " by Kishore.Y, Research Engineer for VLSI 07-08, DA-IICT; Harsha , B-tech 2004, DA-IICT; P.M.Aditya, B-tech 2004, DA-IICT

Verilog HDL Basics (slides)

More details about the projects will be added soon. Note: Any one interested in receiving e-mails regarding the activities of the VLSI group and are interested in participating in various activities of the group, mail your registration with your name, e-mail id and one liner on your past experience to
10-11 Lecture Series *Right Click and choose 'save as' to download the slides

  • Lecture on Reconfigurable Computing by Kishore.Y, Research Engineer for VLSI 07-08
  • Lecture on Delay Insensitive processes in Asynchronous Design by Shagun, B.Tech 2004
  • Lecture on NLC Logic by Aksah, B.Tech 2004
  • Lecture on Introduction to Low Power VLSI Circuits and Adiabatic Logic by Ranjith, M.Tech 2006 (slides)
  • Lecture on Embedded Design using FPGA's by Harsha,Aditya,Mallikarjun, B.Tech 2004


National Workshop on Challenges in VLSI - 21st - 22nd December, 2006


Prof Vishwesvaran's visit


Dr. Venugopinathan’s visit : “Tuning of analog parameters"


Workshop on Challenges in VLSI (NWCV 2005), 13 - 14 May 2005