Project

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#sort iconStudent NameProject TitleProject GuideAbstract
Amara Geeta Madhuri VLSI Implementation of JPEG2000Prof. Amit Bhatt624.jpg (42 KB)
Anand Gautam Soft-Core Reconfigurability for Processor DesignProf. Amit Bhatt (Cadence Design Systems, Bangalore ) 624.jpg (42 KB)
Atul Sethi Bicoherence estimation for nearly-periodic signals Prof. Amit Bhatt 624.jpg (42 KB)
K. Pratyush Aditya Soft-Core Reconfigurability for Processor DesignProf. Amit Bhatt (Cadence Design Systems,Bangalore )Pratyush_Geeta_Priya_Anand.doc (22 KB)
Krashna Nand Mishra VLSI Design and Characterization of Hybrid MacrocellsProf. D.Nagchoudhuri Dr. S. C. Bose (CEERI, Pillani)KNMishra.doc (23 KB)
Kunal SenguptaViterbi Processor for Convolutional codes’ decoding in GSM at Custom levelProf. R.N. Biswas Swapnil_Kunal.doc (55 KB)
Manu Suryavansh Design and Layout of 12 bit Sigma Delta ADCProf. D. Nagchoudhuri manu_suryavansh.doc (424 KB)
Manu Tiwari VLSI Implementation of Systolic Architecture for FIR Filter DesignProf. Amit Bhatt Yogesh_Manu.doc (25 KB)
Neha Bajaj Design of Pre-Processor for Neuro Vision ProcessorProf. D.Nagchoudhuri Dr. A.S.Mandal (CEERI, Pilani)neha_bajaj.doc (20 KB)
Nishant Kumar Jha IDEA ImplementationProf. Amit Bhatt Nishant_jha.doc (79 KB)
Nitesh MaheshwariFloorplanning Algorithms : their application to VLSI Physical DesignProf. Ashok T. AminNitesh.doc (27 KB)
Priya Khandelwal VLSI Implementation of JPEG2000Prof. Amit Bhatt (Cadence Design Systems, Bangalore )Pratyush_Geeta_Priya_Anand(2).doc (22 KB)
Ravi Shekhar VLSI Design of Watermarking AlgorithmProf. R.N. BiswasRavi_Vinod.doc (94 KB)
Sachin Bharadwaj Chopper Stabilized Low Noise, Low Frequency, Low Amplitude Amplifier DesignProf. D. Nagchoudhuri Sachin_Bharadwaj.doc (44 KB)
Sameer Morey Comparative study of custom and synthesis floating point co-processorsProf. D. Nagchoudhuri Sameer.doc (19 KB)
Shishir GoyalCustom Design of Low Thermal Drift Amplifier For Biomedical SignalsProf. D.Nagchoudhurishishir_goyal.doc (147 KB)
Sirisha NalmelaRepresentation of Switching Circuits by Binary-Decision ProgramsProf. D.Nagchoudhuri Dr. Raj Singh (CEERI, Pillani)sirisha_nalmela.doc (34 KB)
Swapnil Agarwal Viterbi Processor for Convolutional codes’ decoding in GSM at Custom levelProf. R.N. Biswas Swapnil_Kunal(2).doc (55 KB)
Vaibhav Mathur Design of 10-bit Algorithmic Pipelined Analog to Digital ConverterProf. C.Parikh Dr. Subash C. Bose (CEERI, Pilani)Vaibhav_Mathur.doc (19 KB)
Varun JasujaCustom design and implementation of 10-bit successive approximation ADC in 1µm technologyProf. D. Nagchoudhuri Varun.doc (20 KB)
Vinod ReddyVLSI Design of Watermarking AlgorithmProf. R.N. Biswas Ravi_Vinod(2).doc (94 KB)
Yogesh Agrawal VLSI Implementation of Systolic Architecture for FIR Filter DesignProf. Amit Bhatt Yogesh_Manu(2).doc (25 KB)